NIAR – TSRI

SiPhCPO Platform and SIG Launch Forum

Le Méridien Taipei Jadeite Room

September 11, 2025 (Thursday)

Plenary Session (Open to All): Taiwan (UTC+8): 13:30–16:45 / Europe (CEST): 07:30–10:45

Members-Only Meeting (By application only; details upon approval):  

Taiwan (UTC+8): 17:00–18:00 / Europe (CEST): 11:00–12:00

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Countdown finished!

Limited On-Site Registration Reopening Announcement


On-site seats are limited — thank you for your enthusiastic support!


The registration system will close at 17:00 on Wednesday,

September 3, or earlier once full capacity is reached.


For inquiries, please contact the event coordinators:

Taiwan Semiconductor Research Institute (TSRI)

I-Na Chen｜ynchen@niar.org.tw

Li-An Yang｜lianyang@niar.org.tw


Silicon Photonics and CPO at a Critical Moment

As next-generation data infrastructure evolves, the success of AI and HPC will increasingly hinge on breakthroughs in photonic-electronic integration. TSRI and its international partners are accelerating the development of a unified SiPh–CPO platform through silicon photonics, modular co-packaging, III-V and TFLN integration, high-speed test automation, and validation line support. Beyond technology, this forum launches an open ecosystem for technical specification co-definition, technical system-level validation, and academic–industry collaboration in education and talent development — empowering the next generation of engineers to shape the future of photonics-enabled computing.

TSRI–SiPhCPO Forum Highlights

Highlights include expert sessions on SiPh–CPO integration, system-lev el co-packaging architecture, and high-speed testing strategies for next-generation data interconnects.

CPO = Essential Packaging for SerDes-on-PIC Integration

Without the support of short-reach architectures and standardized design, it will be difficult to achieve large-scale deployment in data centers with performance targets such as energy consumption below 5 pJ/bit, data rates of 200–400 Gbps per lane, and overall throughput of 1.6–3.2 Tb/s.

TSRI’s Integrated Platform

8+ years of tape-out experience combined with a dedicated CPO validation line and full-stack 120 GHz/400G O/E testing flow.

III-V + Micro-Transfer Printing (MTP)

Laser, SOA, and TFLN modulators enabled via scalable MTP integration with high yield.

Electro-Opto-Thermal–3DIC Co-Design Flows

Advanced modeling frameworks to support CPO design convergence across packaging levels.

High-Performance Test & Spec Definition

Addressing integration tradeoffs in speed, loss, and reliability — toward holistic module + system verification.

Why attend the NIAR–TSRI SiPhCPO Forum?

The silicon photonics ecosystem is entering a critical phase, where system-driven design, high-speed testing, and heterogeneous integration must align for real-world deployment. This is the TSRI dedicated forum focused on Silicon Photonics Co-Packaged Optics (SiPh-CPO) and multi-party SIG collaboration, bringing together global experts, industry users, and academic leaders.


Whether you're looking to access advanced testing capabilities, validate chiplet modules, or join open platform development, this forum is your gateway to the next era of photonics–electronics integration.

Meet the Speakers

Forum Venue

Le Méridien Taipei Jadeite Room

No. 38, SongRen Rd., Xinyi Dist., Taipei City 110, Taiwan

September 11, 2025 (Thursday)

Plenary Session (Open to All): Taiwan (UTC+8): 13:30–16:45 / Europe (CEST): 07:30–10:45

Members-Only Meeting (By application only; details upon approval):

Taiwan (UTC+8): 17:00–18:00 / Europe (CEST): 11:00–12:00

Forum Agenda and Speakers

The forum features both a Plenary Session and a Members-Only Session, focusing on technical specifications, platform architecture, and talent development. 

Plenary Session

Thursday, September 11 | Taiwan (UTC+8): 13:30–16:45 / Europe (CEST): 07:30–10:45

  • 13:30-13:45 (07:30-07:45 CEST) ｜ Welcome Remarks followed by Photo Session

    Minister Cheng-Wen Wu (NSTC)

  • 13:45-14:00 (07:45-08:00 CEST) ｜ Opening Address

    Prof. San-Liang Lee (NTUST)

    Learn More

  • 14:00–14:25 (08:00–08:25 CEST)｜iSiPP: a manufacturing platform for the next-gen Silicon Photonics

    Philippe Absil (imec)

    Learn More

  • 14:25–14:50 (08:25–08:50 CEST)｜TSRI’s Role in Silicon Photonics and Co-Package Optics Platforms

    Ming-Wei Lin (TSRI)

    Learn More

  • 14:50–15:20 (08:50–09:20 CEST)｜Break

  • 15:20–15:40 (09:20–09:40 CEST)｜Hybrid III-V and TFLN integration on silicon photonics

    Prof. Gunther Roelkens (UGent)

    Learn More

  • 15:40–16:00 (09:40–10:00 CEST)｜Si Photonics applied to miniaturized mmWave-over-Fiber Antenna-in-Package

    Prof. Ming-Chang Lee (NTHU)

    Learn More

  • 16:00–16:20 (10:00–10:20 CEST)｜A 112Gb/s PAM-4 XSR Transceiver for CPO Application

    Prof. Pen-Jui Peng (NTHU) 

    Learn More

  • 16:20–16:35 (10:20–10:35 CEST)｜Innovating the Future: Synopsys AI Solutions for Photonic Integrated Circuits and 3DIC Integration

    Dr. Benson Wei

    Learn More

  • 16:35–16:45 (10:35–10:45 CEST)｜Open Q&A Discussion


Members-Only Session

Members-Only Meeting (SIG):Taiwan (UTC+8): 17:00–18:00 / Europe (CEST): 11:00–12:00
Inviting academia and industry SIG members to discuss resource sharing, open module specs, and future SIG collaboration plans.

Registration Form